View source for Remove Verific data structures

'''Q: How do I remove all Verific data structures in memory?'''

To remove Verilog parsetree:

    veri_file::ResetParser();

To remove VHDL parsetree:

    vhdl_file::ResetParser();

To remove synlib parsetree:

    synlib_file::DeleteAllLibraries();

To remove hierarchy tree:

    hier_tree::DeleteHierarchicalTree() ;

To remove UPF data structures, use:

    upf_file::DeleteAll();

To remove the netlist database:

    delete Libset::Global();

To remove linefile data (make sure that you've removed all parsetrees and the netlist database):

    LineFile::DeleteAllLineFiles();
    LineFile::ResetFileIdMaps();