Difference between revisions of "Remove Verific data structures"

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(Created page with "'''Q: How do I remove all Verific data structures in memory?''' To remove Verilog parsetree: veri_file::ResetParser(); To remove VHDL parsetree: vhdl_file::ResetPa...")
 
 
(8 intermediate revisions by the same user not shown)
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'''Q: How do I remove all Verific data structures in memory?'''
 
'''Q: How do I remove all Verific data structures in memory?'''
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To remove hdl file sorting data:
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    hdl_file_sort::Reset();
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To reset file system cache:
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    FileSystem::ResetDirectoryCache();
  
 
To remove Verilog parsetree:
 
To remove Verilog parsetree:
  
−
     veri_file::ResetParser();
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     veri_file::Reset();
  
 
To remove VHDL parsetree:
 
To remove VHDL parsetree:
  
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     vhdl_file::ResetParser();
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     vhdl_file::Reset();
  
 
To remove synlib parsetree:
 
To remove synlib parsetree:
  
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     synlib_file::DeleteAllLibraries();
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     synlib_file::Reset();
  
 
To remove hierarchy tree:
 
To remove hierarchy tree:
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     hier_tree::DeleteHierarchicalTree() ;
 
     hier_tree::DeleteHierarchicalTree() ;
  
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To remove UPF data structures, use:
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To remove UPF data structures:
  
 
     upf_file::DeleteAll();
 
     upf_file::DeleteAll();
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To remove the netlist database:
 
To remove the netlist database:
  
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     delete Libset::Global();
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     Libset::Reset();
  
 
To remove linefile data (make sure that you've removed all parsetrees and the netlist database):
 
To remove linefile data (make sure that you've removed all parsetrees and the netlist database):
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     LineFile::DeleteAllLineFiles();
 
     LineFile::DeleteAllLineFiles();
 
     LineFile::ResetFileIdMaps();
 
     LineFile::ResetFileIdMaps();
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To remove message type settings:
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    Message::Reset();
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To reset run-time flags:
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    RuntimeFlags::DeleteAllFlags();

Latest revision as of 17:15, 18 October 2024

Q: How do I remove all Verific data structures in memory?

To remove hdl file sorting data: 

   hdl_file_sort::Reset();

To reset file system cache: 

   FileSystem::ResetDirectoryCache();

To remove Verilog parsetree: 

   veri_file::Reset();

To remove VHDL parsetree: 

   vhdl_file::Reset();

To remove synlib parsetree: 

   synlib_file::Reset();

To remove hierarchy tree: 

   hier_tree::DeleteHierarchicalTree() ;

To remove UPF data structures: 

   upf_file::DeleteAll();

To remove the netlist database: 

   Libset::Reset();

To remove linefile data (make sure that you've removed all parsetrees and the netlist database): 

   LineFile::DeleteAllLineFiles();
   LineFile::ResetFileIdMaps();

To remove message type settings: 

   Message::Reset();

To reset run-time flags: 

   RuntimeFlags::DeleteAllFlags();
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