Statically elaborate with different values of parameters

C++:

#include "VeriCopy.h"       // Make class VeriMapForCopy available
#include "Map.h"            // Make class Map available
#include "Message.h"        // Make message handlers available
#include "veri_file.h"      // Make verilog reader available
#include "VeriModule.h"     // Definition of a VeriModule and VeriPrimitive
#include "VeriLibrary.h"
#include "Array.h"          // Make class Array available
#include "VeriId.h"         // Definitions of all verilog identifier nodes
#include "Strings.h"        // Definition of class to manipulate copy, concatenate, create etc...

#ifdef VERIFIC_NAMESPACE
using namespace Verific ;
#endif


int main()
{
    const char *file_name = "test.sv" ;
   
    if (!veri_file::Analyze(file_name, veri_file::SYSTEM_VERILOG)) return 1 ;
    
    // Get all the top level modules
    Array *all_top_modules = veri_file::GetTopModules("work") ;

    Map *param_map = new Map(STRING_HASH) ;
    // Apply set only module 'top1'
    (void) param_map->Insert("top1/p", "8") ;

    // Pass parameter map to set new value to parameter 'p' of module 'top1' only 
    if (!veri_file::ElaborateMultipleTopStatic(all_top_modules, param_map)) {
        delete param_map ;
        return 1 ;
    }
    delete all_top_modules ;
    param_map->Reset() ;
                    
    veri_file::PrettyPrint("test1_se_pp.v.golden.new", 0, 0) ;
    veri_file::ResetParser() ;

    if (!veri_file::Analyze(file_name, veri_file::SYSTEM_VERILOG)) return 1 ;
    
    // Get all the top level modules
    all_top_modules = veri_file::GetTopModules("work") ;

    // Apply to all top level modules
    (void) param_map->Insert("p", "18") ;

    // Pass parameter map to set new value to parameter 'p' of module 'top1' and 'top2' 
    if (!veri_file::ElaborateMultipleTopStatic(all_top_modules, param_map)) {
        delete param_map ;
        return 1 ;
    }
    delete all_top_modules ;
                    
    veri_file::PrettyPrint("test2_se_pp.v.golden.new", 0, 0) ;
    delete param_map ;


    return 0 ;
}
 

input test.sv:

module top1 ;
  parameter p = 1 ;

endmodule

module top2 ;
  parameter p = 1 ;
endmodule
 

output test1_se_pp.v.golden.new

module top1 /* mod = work.top1 */ ;
    parameter p = 1 ; 
endmodule



module top2 /* mod = work.top2 */ ;
    parameter p = 1 ; 
endmodule



module \top1(p=8)  /* mod = work.top1(p=8) */ ;
    parameter p = 8 ; 
endmodule
 

output test2_se_pp.v.golden.new

module top1 /* mod = work.top1 */ ;
    parameter p = 1 ; 
endmodule



module top2 /* mod = work.top2 */ ;
    parameter p = 1 ; 
endmodule



module \top1(p=18)  /* mod = work.top1(p=18) */ ;
    parameter p = 18 ; 
endmodule



module \top2(p=18)  /* mod = work.top2(p=18) */ ;
    parameter p = 18 ; 
endmodule