While looking at a Netlist

Q: While looking at a Netlist, is there a clean way to look back at what VeriModule* or VhdlPrimaryUnit* this netlist was derived from?

For example, a module:

   module mod();
   parameter WIDTH=2;
   ...
   endmodule

would elaborate to a netlist name \mod(WIDTH=2) or if instantiated with a different width \mod(WIDTH=4)

There are "system" attributes attached to the Netlist that you may find useful. Note the leading space:

key: " language", value: one of "verilog" "vhdl".

key: " cell_name", value: original module/unit name.

See also Netlist::CellBaseName().

Once you get the original name of the module/unit, you can search the parse tree for it.